Presentation at Advanced Packaging International 2026 are grouped into 4 key themes which collectively provide complete coverage of the global packaging industry.
If you are interested in speaking at Advanced Packaging International 2026, please contact [email protected] or call +44 (0)24 7671 8970.
The semiconductor industry is entering an era defined by unprecedented performance demands, driven by AI, quantum computing, hyperscale data centers, and EV growth. Addressing these inflection points requires lithography solutions that can go beyond the limits of conventional optical and single-beam e-beam technologies. In this presentation, we introduce the world’s first high-productivity multi-column e-beam lithography systems designed for fab production. With large depth of focus, wide field of view, ultra-high resolution, and adaptable patterning capabilities, Multibeam systems enable device makers to achieve novel, performance-optimized system architectures across various growing applications, including advanced packaging, quantum, compound semiconductors/power devices, silicon photonics, rapid prototyping and more. In advanced packaging—where performance, power efficiency, and yield are paramount—our systems are enabling the transition to advanced heterogeneous integration at wafer scale, and rapid production of purpose-built chips. This new generation of packaging allows chip-to-chip interconnects to approach on-chip interconnect performance, enabling an ~10× reduction in latency, ~40× improvement in bandwidth density, and ~100× improvement in transfer-energy-per-bit. Multibeam can also be leveraged to accelerate critical technologies like backside power delivery and provide higher-yielding alternatives to bridge-die approaches, paving the way for scalable, manufacturable heterogeneous integration. Discover how Multibeam’s multi-column e-beam lithography is reshaping the path forward for the most demanding semiconductor applications and enabling high-density Advanced Integration at the Leading Edge, today.
This session would explore how innovations in chip packaging, heterogeneous integration, and system-level design are redefining performance, efficiency, and reliability across AI and power electronics applications — connecting perspectives from both semiconductor R&D and real-world deployment.
As advanced packaging outpaces front-end scaling, heterogeneous integration demands interconnects with higher density, larger routing area, and more efficient manufacturing processes. Syenta’s Localized Electrochemical Metallization (LEM) is a maskless, additive copper (and other metals) patterning method that enables 1 µm line/space interconnects on 300 mm wafers and panels (including organic substrates) while eliminating 30-50% SAP and damascene steps. By directly transferring patterns through a localized electrochemical process, LEM supports large-area RDL without reticle stitching, critical for chiplet-based AI/HPC architectures and HBM integration. With this platform, addressing the AI Memory Wall becomes a reality. Modern AI accelerators are limited not by compute, but by data movement. HBM-to-logic bandwidth scaling is now dominated by RDL density limits. LEM’s fine-pitch, large-area metallization provides 5–10× higher bandwidth density, directly alleviating this bottleneck and enabling larger multi-die systems. LEM reduces interconnect process complexity by 30–50% and accelerates cycle time by ~40%. The presentation highlights recent achievements in density, area, and mixed-CD structures, along with the roadmap toward sub-micron multilayer integration.
Awaiting presentation abstract.
Awaiting presentation abstract.
Awaiting presentation abstract.
Awaiting presentation abstract.
Awaiting presentation abstract.
Awaiting presentation abstract.
Awaiting presentation abstract.
Awaiting presentation abstract.
Awaiting presentation abstract.
Efficient thermal management, particularly at the packaging level, is becoming increasingly crucial for high-power-density electronic devices. The heat spreader, onto which the semiconductor die is directly attached, is a key component of the package. Ideally, it should have high thermal conductivity while maintaining a compatible coefficient of thermal expansion (CTE). Metal diamond composites are promising candidates, as both their CTE and the thermal conductivity can be tailored to suit specific application. In this talk, we will present a comparative study of the thermal performance of metal-diamond composite heat spreaders versus standard materials, using frequency domain thermal reflectance, Raman thermography measurements, and finite element thermal simulations. We will also highlight the importance of the thermal interface materials (TIMs) in the overall thermal behavior of the package.
As device power densities continue to rise in AI, HPC, and power electronics, thermal management has become one of the most pressing bottlenecks in advanced packaging. Diamond, with its unmatched thermal conductivity, high bandgap and radiation hardness, offers a unique pathway to overcome these challenges. This talk will highlight recent advances in integrating synthetic diamond into advanced packaging — from heat spreaders and chip-carriers to on-die caps — enabling significant reductions in hotspot temperatures and improvements in energy efficiency. Potential applications will be discussed for both data centers, where cooling demands are escalating, and space electronics, where thermal reliability under extreme conditions is mission-critical.
Awaiting presentation abstract.
Awaiting presentation abstract.
Awaiting presentation abstract.
Awaiting presentation abstract.
Awaiting presentation abstract.
Awaiting presentation abstract.
Awaiting presentation abstract.
